Browse packages

riscv-vme

1.0.0Readiness: RL1Packaged

by extensilica

RISC-V Vector Matrix Extension (working draft, placeholder)

Pre-silicon bridge: this package is meant to be evaluable before RTL/FPGA/ASIC decisions.

Readiness & capabilities

Readiness: RL1Packaged

Runnable (entry declared)
Testable (testEntry declared)
Repro: bundled
Repro: resolved
Repro: host-dependent
Toolchain: bundled
Toolchain: external
Sim: Spike
Emu: QEMU
RTL
FPGA
Tests

README

RISC-V Vector Matrix Extension (working draft, placeholder)

Version History

VersionPublishedStatus
1.0.0latest
xsil install [email protected]
May 14, 2026active

Downloads

0

Last 7 days

0

Last 30 days

0

All time

Daily downloads — last 30 days

05-0105-0805-1505-2205-2905-30

By version

1.0.0
0

Reviews

Sign in to leave a review.

No reviews yet

Be the first to leave a review.